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Data Structures</h2></td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_spi_ps___config.html">XSpiPs_Config</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">This typedef contains configuration information for the device.  <a href="struct_x_spi_ps___config.html#details">More...</a><br /></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_spi_ps.html">XSpiPs</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">The <a class="el" href="struct_x_spi_ps.html" title="The XSpiPs driver instance data. ">XSpiPs</a> driver instance data.  <a href="struct_x_spi_ps.html#details">More...</a><br /></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
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Macros</h2></td></tr>
<tr class="memitem:gac782d76352000f7cab838491744a022a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spips__v3__0.html#gac782d76352000f7cab838491744a022a">XSpiPs_SetSlaveIdle</a>(InstancePtr,  RegisterValue)</td></tr>
<tr class="memdesc:gac782d76352000f7cab838491744a022a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set the contents of the slave idle count register.  <a href="group__spips__v3__0.html#gac782d76352000f7cab838491744a022a">More...</a><br /></td></tr>
<tr class="separator:gac782d76352000f7cab838491744a022a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8f2055cfa93a26da233dff2fa8b0af8b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spips__v3__0.html#ga8f2055cfa93a26da233dff2fa8b0af8b">XSpiPs_GetSlaveIdle</a>(InstancePtr)</td></tr>
<tr class="memdesc:ga8f2055cfa93a26da233dff2fa8b0af8b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get the contents of the slave idle count register.  <a href="group__spips__v3__0.html#ga8f2055cfa93a26da233dff2fa8b0af8b">More...</a><br /></td></tr>
<tr class="separator:ga8f2055cfa93a26da233dff2fa8b0af8b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5501c2b3144a42ec20d93bcaa4732797"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spips__v3__0.html#ga5501c2b3144a42ec20d93bcaa4732797">XSpiPs_SetTXWatermark</a>(InstancePtr,  RegisterValue)</td></tr>
<tr class="memdesc:ga5501c2b3144a42ec20d93bcaa4732797"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set the contents of the transmit FIFO watermark register.  <a href="group__spips__v3__0.html#ga5501c2b3144a42ec20d93bcaa4732797">More...</a><br /></td></tr>
<tr class="separator:ga5501c2b3144a42ec20d93bcaa4732797"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae768acaf29460ddf625c0842a6546991"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spips__v3__0.html#gae768acaf29460ddf625c0842a6546991">XSpiPs_GetTXWatermark</a>(InstancePtr)&#160;&#160;&#160;XSpiPs_In32(((InstancePtr)-&gt;Config.BaseAddress) + <a class="el" href="group__spips__v3__0.html#ga82b0c7855556fbb3d13b1d0fc3f7ae24">XSPIPS_TXWR_OFFSET</a>)</td></tr>
<tr class="memdesc:gae768acaf29460ddf625c0842a6546991"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get the contents of the transmit FIFO watermark register.  <a href="group__spips__v3__0.html#gae768acaf29460ddf625c0842a6546991">More...</a><br /></td></tr>
<tr class="separator:gae768acaf29460ddf625c0842a6546991"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gabf7789f973a99a1192e89e6df23b8d84"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spips__v3__0.html#gabf7789f973a99a1192e89e6df23b8d84">XSpiPs_SetRXWatermark</a>(InstancePtr,  RegisterValue)</td></tr>
<tr class="memdesc:gabf7789f973a99a1192e89e6df23b8d84"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set the contents of the receive FIFO watermark register.  <a href="group__spips__v3__0.html#gabf7789f973a99a1192e89e6df23b8d84">More...</a><br /></td></tr>
<tr class="separator:gabf7789f973a99a1192e89e6df23b8d84"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga27fb8402703b83365149ff051bb7aee8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spips__v3__0.html#ga27fb8402703b83365149ff051bb7aee8">XSpiPs_GetRXWatermark</a>(InstancePtr)&#160;&#160;&#160;XSpiPs_In32(((InstancePtr)-&gt;Config.BaseAddress) + <a class="el" href="group__spips__v3__0.html#ga708b416f4994dca83b3d50a464552286">XSPIPS_RXWR_OFFSET</a>)</td></tr>
<tr class="memdesc:ga27fb8402703b83365149ff051bb7aee8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get the contents of the receive FIFO watermark register.  <a href="group__spips__v3__0.html#ga27fb8402703b83365149ff051bb7aee8">More...</a><br /></td></tr>
<tr class="separator:ga27fb8402703b83365149ff051bb7aee8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7b3a41972453b0dfb7ec90f3972ddc74"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spips__v3__0.html#ga7b3a41972453b0dfb7ec90f3972ddc74">XSpiPs_Enable</a>(InstancePtr)</td></tr>
<tr class="memdesc:ga7b3a41972453b0dfb7ec90f3972ddc74"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable the device and uninhibit master transactions.  <a href="group__spips__v3__0.html#ga7b3a41972453b0dfb7ec90f3972ddc74">More...</a><br /></td></tr>
<tr class="separator:ga7b3a41972453b0dfb7ec90f3972ddc74"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae33752db88677fe0580abb65d6ba70cf"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spips__v3__0.html#gae33752db88677fe0580abb65d6ba70cf">XSpiPs_Disable</a>(InstancePtr)&#160;&#160;&#160;XSpiPs_Out32(((InstancePtr)-&gt;Config.BaseAddress) + <a class="el" href="group__spips__v3__0.html#ga96a2524f86a513015b982462f7a6ffcb">XSPIPS_ER_OFFSET</a>, 0U)</td></tr>
<tr class="memdesc:gae33752db88677fe0580abb65d6ba70cf"><td class="mdescLeft">&#160;</td><td class="mdescRight">Disable the device.  <a href="group__spips__v3__0.html#gae33752db88677fe0580abb65d6ba70cf">More...</a><br /></td></tr>
<tr class="separator:gae33752db88677fe0580abb65d6ba70cf"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr><td colspan="2"><div class="groupHeader">Configuration options</div></td></tr>
<tr><td colspan="2"><div class="groupText"><p>The following options are supported to enable/disable certain features of an SPI device.</p>
<p>Each of the options is a bit mask, so more than one may be specified.</p>
<p><b>The Master option</b> configures the SPI device as a master. By default, the device is a slave.</p>
<p>The <b>Active Low Clock option</b> configures the device's clock polarity. Setting this option means the clock is active low and the SCK signal idles high. By default, the clock is active high and SCK idles low.</p>
<p>The <b>Clock Phase option</b> configures the SPI device for one of two transfer formats. A clock phase of 0, the default, means data is valid on the first SCK edge (rising or falling) after the slave select (SS) signal has been asserted. A clock phase of 1 means data is valid on the second SCK edge (rising or falling) after SS has been asserted.</p>
<p>The <b>Slave Select Decode Enable option</b> selects how the SPI_SS_outN are controlled by the SPI Slave Select Decode bits. 0: Use this setting for the standard configuration of up to three slave select outputs. Only one of the three slave select outputs will be low. (Default) 1: Use this setting for the optional configuration of an additional decoder to support 8 slave select outputs. SPI_SS_outN reflects the value in the register.</p>
<p>The <b>SPI Force Slave Select option</b> is used to enable manual control of the signals SPI_SS_outN. 0: The SPI_SS_outN signals are controlled by the SPI controller during transfers. (Default) 1: The SPI_SS_outN signal indicated by the Slave Select Control bit is forced active (driven low) regardless of any transfers in progress.</p>
<p>NOTE: The driver will handle setting and clearing the Slave Select when the user sets the "FORCE_SSELECT_OPTION". Using this option will allow the SPI clock to be set to a faster speed. If the SPI clock is too fast, the processor cannot empty and refill the FIFOs before the TX FIFO is empty When the SPI hardware is controlling the Slave Select signals, this will cause slave to be de-selected and terminate the transfer.</p>
<p>The <b>Manual Start option</b> is used to enable manual control of the Start command to perform data transfer. 0: The Start command is controlled by the SPI controller during transfers(Default). Data transmission starts as soon as there is data in the TXFIFO and stalls when the TXFIFO is empty 1: The Start command must be issued by software to perform data transfer. Bit 15 of Configuration register is used to issue Start command. This bit must be set whenever TXFIFO is filled with new data.</p>
<p>NOTE: The driver will set the Manual Start Enable bit in Configuration Register, if Manual Start option is selected. Software will issue Manual Start command whenever TXFIFO is filled with data. When there is no further data, driver will clear the Manual Start Enable bit. </p>
</div></td></tr>
<tr class="memitem:ga1fbe2203de88e79aa3a6c7e70e2f3436"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spips__v3__0.html#ga1fbe2203de88e79aa3a6c7e70e2f3436">XSPIPS_MASTER_OPTION</a>&#160;&#160;&#160;0x00000001U</td></tr>
<tr class="memdesc:ga1fbe2203de88e79aa3a6c7e70e2f3436"><td class="mdescLeft">&#160;</td><td class="mdescRight">Master mode option.  <a href="group__spips__v3__0.html#ga1fbe2203de88e79aa3a6c7e70e2f3436">More...</a><br /></td></tr>
<tr class="separator:ga1fbe2203de88e79aa3a6c7e70e2f3436"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0aab1b9650381f6e5c64f424ec67844d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spips__v3__0.html#ga0aab1b9650381f6e5c64f424ec67844d">XSPIPS_CLK_ACTIVE_LOW_OPTION</a>&#160;&#160;&#160;0x00000002U</td></tr>
<tr class="memdesc:ga0aab1b9650381f6e5c64f424ec67844d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Active Low Clock option.  <a href="group__spips__v3__0.html#ga0aab1b9650381f6e5c64f424ec67844d">More...</a><br /></td></tr>
<tr class="separator:ga0aab1b9650381f6e5c64f424ec67844d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga25ffb7f933bd33275a89e6d1d0d340ad"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spips__v3__0.html#ga25ffb7f933bd33275a89e6d1d0d340ad">XSPIPS_CLK_PHASE_1_OPTION</a>&#160;&#160;&#160;0x00000004U</td></tr>
<tr class="memdesc:ga25ffb7f933bd33275a89e6d1d0d340ad"><td class="mdescLeft">&#160;</td><td class="mdescRight">Clock Phase one option.  <a href="group__spips__v3__0.html#ga25ffb7f933bd33275a89e6d1d0d340ad">More...</a><br /></td></tr>
<tr class="separator:ga25ffb7f933bd33275a89e6d1d0d340ad"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga33e1010355cd9aca2d607fd41140fdce"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spips__v3__0.html#ga33e1010355cd9aca2d607fd41140fdce">XSPIPS_DECODE_SSELECT_OPTION</a>&#160;&#160;&#160;0x00000008U</td></tr>
<tr class="memdesc:ga33e1010355cd9aca2d607fd41140fdce"><td class="mdescLeft">&#160;</td><td class="mdescRight">Select 16 slaves Option.  <a href="group__spips__v3__0.html#ga33e1010355cd9aca2d607fd41140fdce">More...</a><br /></td></tr>
<tr class="separator:ga33e1010355cd9aca2d607fd41140fdce"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf0a0da0e20b70ee21a3998117785638e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spips__v3__0.html#gaf0a0da0e20b70ee21a3998117785638e">XSPIPS_FORCE_SSELECT_OPTION</a>&#160;&#160;&#160;0x00000010U</td></tr>
<tr class="memdesc:gaf0a0da0e20b70ee21a3998117785638e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Force Slave Select.  <a href="group__spips__v3__0.html#gaf0a0da0e20b70ee21a3998117785638e">More...</a><br /></td></tr>
<tr class="separator:gaf0a0da0e20b70ee21a3998117785638e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7e6e32f2a23f47aa9f69c6adccbd2ba3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spips__v3__0.html#ga7e6e32f2a23f47aa9f69c6adccbd2ba3">XSPIPS_MANUAL_START_OPTION</a>&#160;&#160;&#160;0x00000020U</td></tr>
<tr class="memdesc:ga7e6e32f2a23f47aa9f69c6adccbd2ba3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Manual Start mode option.  <a href="group__spips__v3__0.html#ga7e6e32f2a23f47aa9f69c6adccbd2ba3">More...</a><br /></td></tr>
<tr class="separator:ga7e6e32f2a23f47aa9f69c6adccbd2ba3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr><td colspan="2"><div class="groupHeader">SPI Clock Prescaler options</div></td></tr>
<tr><td colspan="2"><div class="groupText"><p>The SPI Clock Prescaler Configuration bits are used to program master mode bit rate.</p>
<p>The bit rate can be programmed in divide-by-two decrements from pclk/4 to pclk/256. </p>
</div></td></tr>
<tr class="memitem:ga4984355789693743e51841fd3078cd29"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spips__v3__0.html#ga4984355789693743e51841fd3078cd29">XSPIPS_CLK_PRESCALE_4</a>&#160;&#160;&#160;0x01U</td></tr>
<tr class="memdesc:ga4984355789693743e51841fd3078cd29"><td class="mdescLeft">&#160;</td><td class="mdescRight">PCLK/4 Prescaler.  <a href="group__spips__v3__0.html#ga4984355789693743e51841fd3078cd29">More...</a><br /></td></tr>
<tr class="separator:ga4984355789693743e51841fd3078cd29"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga797ea1218c463e962b5bb3e8c1660519"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spips__v3__0.html#ga797ea1218c463e962b5bb3e8c1660519">XSPIPS_CLK_PRESCALE_8</a>&#160;&#160;&#160;0x02U</td></tr>
<tr class="memdesc:ga797ea1218c463e962b5bb3e8c1660519"><td class="mdescLeft">&#160;</td><td class="mdescRight">PCLK/8 Prescaler.  <a href="group__spips__v3__0.html#ga797ea1218c463e962b5bb3e8c1660519">More...</a><br /></td></tr>
<tr class="separator:ga797ea1218c463e962b5bb3e8c1660519"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga46beb1bbc0f69b94eba21c4e9495c8f9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spips__v3__0.html#ga46beb1bbc0f69b94eba21c4e9495c8f9">XSPIPS_CLK_PRESCALE_16</a>&#160;&#160;&#160;0x03U</td></tr>
<tr class="memdesc:ga46beb1bbc0f69b94eba21c4e9495c8f9"><td class="mdescLeft">&#160;</td><td class="mdescRight">PCLK/16 Prescaler.  <a href="group__spips__v3__0.html#ga46beb1bbc0f69b94eba21c4e9495c8f9">More...</a><br /></td></tr>
<tr class="separator:ga46beb1bbc0f69b94eba21c4e9495c8f9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga17461c15895ead044069b54cb0de879c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spips__v3__0.html#ga17461c15895ead044069b54cb0de879c">XSPIPS_CLK_PRESCALE_32</a>&#160;&#160;&#160;0x04U</td></tr>
<tr class="memdesc:ga17461c15895ead044069b54cb0de879c"><td class="mdescLeft">&#160;</td><td class="mdescRight">PCLK/32 Prescaler.  <a href="group__spips__v3__0.html#ga17461c15895ead044069b54cb0de879c">More...</a><br /></td></tr>
<tr class="separator:ga17461c15895ead044069b54cb0de879c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac069eaeb884436a488dbf5d8d56b990e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spips__v3__0.html#gac069eaeb884436a488dbf5d8d56b990e">XSPIPS_CLK_PRESCALE_64</a>&#160;&#160;&#160;0x05U</td></tr>
<tr class="memdesc:gac069eaeb884436a488dbf5d8d56b990e"><td class="mdescLeft">&#160;</td><td class="mdescRight">PCLK/64 Prescaler.  <a href="group__spips__v3__0.html#gac069eaeb884436a488dbf5d8d56b990e">More...</a><br /></td></tr>
<tr class="separator:gac069eaeb884436a488dbf5d8d56b990e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga009c993558540f5018f794996594f34c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spips__v3__0.html#ga009c993558540f5018f794996594f34c">XSPIPS_CLK_PRESCALE_128</a>&#160;&#160;&#160;0x06U</td></tr>
<tr class="memdesc:ga009c993558540f5018f794996594f34c"><td class="mdescLeft">&#160;</td><td class="mdescRight">PCLK/128 Prescaler.  <a href="group__spips__v3__0.html#ga009c993558540f5018f794996594f34c">More...</a><br /></td></tr>
<tr class="separator:ga009c993558540f5018f794996594f34c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga554021caf9a775e3dceedbc67e8b8dff"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spips__v3__0.html#ga554021caf9a775e3dceedbc67e8b8dff">XSPIPS_CLK_PRESCALE_256</a>&#160;&#160;&#160;0x07U</td></tr>
<tr class="memdesc:ga554021caf9a775e3dceedbc67e8b8dff"><td class="mdescLeft">&#160;</td><td class="mdescRight">PCLK/256 Prescaler.  <a href="group__spips__v3__0.html#ga554021caf9a775e3dceedbc67e8b8dff">More...</a><br /></td></tr>
<tr class="separator:ga554021caf9a775e3dceedbc67e8b8dff"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr><td colspan="2"><div class="groupHeader">Callback events</div></td></tr>
<tr><td colspan="2"><div class="groupText"><p>These constants specify the handler events that are passed to a handler from the driver.</p>
<p>These constants are not bit masks such that only one will be passed at a time to the handler. </p>
</div></td></tr>
<tr class="memitem:ga57a4f4acf38b7c34eea6033c26f91bf9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spips__v3__0.html#ga57a4f4acf38b7c34eea6033c26f91bf9">XSPIPS_EVENT_MODE_FAULT</a>&#160;&#160;&#160;1U</td></tr>
<tr class="memdesc:ga57a4f4acf38b7c34eea6033c26f91bf9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Mode fault error.  <a href="group__spips__v3__0.html#ga57a4f4acf38b7c34eea6033c26f91bf9">More...</a><br /></td></tr>
<tr class="separator:ga57a4f4acf38b7c34eea6033c26f91bf9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga001caa2536734fec092dedbd484204e9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spips__v3__0.html#ga001caa2536734fec092dedbd484204e9">XSPIPS_EVENT_TRANSFER_DONE</a>&#160;&#160;&#160;2U</td></tr>
<tr class="memdesc:ga001caa2536734fec092dedbd484204e9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Transfer done.  <a href="group__spips__v3__0.html#ga001caa2536734fec092dedbd484204e9">More...</a><br /></td></tr>
<tr class="separator:ga001caa2536734fec092dedbd484204e9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2b83686724f80b3ca235108497ffb99e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spips__v3__0.html#ga2b83686724f80b3ca235108497ffb99e">XSPIPS_EVENT_TRANSMIT_UNDERRUN</a>&#160;&#160;&#160;3U</td></tr>
<tr class="memdesc:ga2b83686724f80b3ca235108497ffb99e"><td class="mdescLeft">&#160;</td><td class="mdescRight">TX FIFO empty.  <a href="group__spips__v3__0.html#ga2b83686724f80b3ca235108497ffb99e">More...</a><br /></td></tr>
<tr class="separator:ga2b83686724f80b3ca235108497ffb99e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6fd689b3734d076736704ba0ea228502"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spips__v3__0.html#ga6fd689b3734d076736704ba0ea228502">XSPIPS_EVENT_RECEIVE_OVERRUN</a>&#160;&#160;&#160;4U</td></tr>
<tr class="memdesc:ga6fd689b3734d076736704ba0ea228502"><td class="mdescLeft">&#160;</td><td class="mdescRight">Receive data loss because RX FIFO full.  <a href="group__spips__v3__0.html#ga6fd689b3734d076736704ba0ea228502">More...</a><br /></td></tr>
<tr class="separator:ga6fd689b3734d076736704ba0ea228502"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="typedef-members"></a>
Typedefs</h2></td></tr>
<tr class="memitem:gaec95e118eb971ab521b5a348a9861783"><td class="memItemLeft" align="right" valign="top">typedef void(*&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spips__v3__0.html#gaec95e118eb971ab521b5a348a9861783">XSpiPs_StatusHandler</a>) (void *CallBackRef, u32 StatusEvent, u32 ByteCount)</td></tr>
<tr class="memdesc:gaec95e118eb971ab521b5a348a9861783"><td class="mdescLeft">&#160;</td><td class="mdescRight">The handler data type allows the user to define a callback function to handle the asynchronous processing for the SPI device.  <a href="group__spips__v3__0.html#gaec95e118eb971ab521b5a348a9861783">More...</a><br /></td></tr>
<tr class="separator:gaec95e118eb971ab521b5a348a9861783"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
Functions</h2></td></tr>
<tr class="memitem:ga70c86f3842f5996d9d7fc874466f4136"><td class="memItemLeft" align="right" valign="top"><a class="el" href="struct_x_spi_ps___config.html">XSpiPs_Config</a> *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spips__v3__0.html#ga70c86f3842f5996d9d7fc874466f4136">XSpiPs_LookupConfig</a> (u16 DeviceId)</td></tr>
<tr class="memdesc:ga70c86f3842f5996d9d7fc874466f4136"><td class="mdescLeft">&#160;</td><td class="mdescRight">Looks up the device configuration based on the unique device ID.  <a href="group__spips__v3__0.html#ga70c86f3842f5996d9d7fc874466f4136">More...</a><br /></td></tr>
<tr class="separator:ga70c86f3842f5996d9d7fc874466f4136"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga66fc6e7b4ec94e279b89cc0eab2debf2"><td class="memItemLeft" align="right" valign="top">s32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spips__v3__0.html#ga66fc6e7b4ec94e279b89cc0eab2debf2">XSpiPs_CfgInitialize</a> (<a class="el" href="struct_x_spi_ps.html">XSpiPs</a> *InstancePtr, <a class="el" href="struct_x_spi_ps___config.html">XSpiPs_Config</a> *ConfigPtr, u32 EffectiveAddr)</td></tr>
<tr class="memdesc:ga66fc6e7b4ec94e279b89cc0eab2debf2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initializes a specific <a class="el" href="struct_x_spi_ps.html" title="The XSpiPs driver instance data. ">XSpiPs</a> instance such that the driver is ready to use.  <a href="group__spips__v3__0.html#ga66fc6e7b4ec94e279b89cc0eab2debf2">More...</a><br /></td></tr>
<tr class="separator:ga66fc6e7b4ec94e279b89cc0eab2debf2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad3abd2456cfa67bc8d24dd255ba7de51"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spips__v3__0.html#gad3abd2456cfa67bc8d24dd255ba7de51">XSpiPs_Reset</a> (<a class="el" href="struct_x_spi_ps.html">XSpiPs</a> *InstancePtr)</td></tr>
<tr class="memdesc:gad3abd2456cfa67bc8d24dd255ba7de51"><td class="mdescLeft">&#160;</td><td class="mdescRight">Resets the SPI device.  <a href="group__spips__v3__0.html#gad3abd2456cfa67bc8d24dd255ba7de51">More...</a><br /></td></tr>
<tr class="separator:gad3abd2456cfa67bc8d24dd255ba7de51"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga747939dd62eb9c82ed185611e95211c7"><td class="memItemLeft" align="right" valign="top">s32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spips__v3__0.html#ga747939dd62eb9c82ed185611e95211c7">XSpiPs_Transfer</a> (<a class="el" href="struct_x_spi_ps.html">XSpiPs</a> *InstancePtr, u8 *SendBufPtr, u8 *RecvBufPtr, u32 ByteCount)</td></tr>
<tr class="memdesc:ga747939dd62eb9c82ed185611e95211c7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Transfers specified data on the SPI bus.  <a href="group__spips__v3__0.html#ga747939dd62eb9c82ed185611e95211c7">More...</a><br /></td></tr>
<tr class="separator:ga747939dd62eb9c82ed185611e95211c7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga94490f99431c92c2a9a54cc41d4abe71"><td class="memItemLeft" align="right" valign="top">s32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spips__v3__0.html#ga94490f99431c92c2a9a54cc41d4abe71">XSpiPs_PolledTransfer</a> (<a class="el" href="struct_x_spi_ps.html">XSpiPs</a> *InstancePtr, u8 *SendBufPtr, u8 *RecvBufPtr, u32 ByteCount)</td></tr>
<tr class="memdesc:ga94490f99431c92c2a9a54cc41d4abe71"><td class="mdescLeft">&#160;</td><td class="mdescRight">Transfers specified data on the SPI bus in polled mode.  <a href="group__spips__v3__0.html#ga94490f99431c92c2a9a54cc41d4abe71">More...</a><br /></td></tr>
<tr class="separator:ga94490f99431c92c2a9a54cc41d4abe71"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gacafc99130a16e99abb3d86e682f1de09"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spips__v3__0.html#gacafc99130a16e99abb3d86e682f1de09">XSpiPs_SetStatusHandler</a> (<a class="el" href="struct_x_spi_ps.html">XSpiPs</a> *InstancePtr, void *CallBackRef, <a class="el" href="group__spips__v3__0.html#gaec95e118eb971ab521b5a348a9861783">XSpiPs_StatusHandler</a> FunctionPtr)</td></tr>
<tr class="memdesc:gacafc99130a16e99abb3d86e682f1de09"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sets the status callback function, the status handler, which the driver calls when it encounters conditions that should be reported to upper layer software.  <a href="group__spips__v3__0.html#gacafc99130a16e99abb3d86e682f1de09">More...</a><br /></td></tr>
<tr class="separator:gacafc99130a16e99abb3d86e682f1de09"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac57ccd3fab9a25399bdb8bc234fecc66"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spips__v3__0.html#gac57ccd3fab9a25399bdb8bc234fecc66">XSpiPs_InterruptHandler</a> (<a class="el" href="struct_x_spi_ps.html">XSpiPs</a> *InstancePtr)</td></tr>
<tr class="memdesc:gac57ccd3fab9a25399bdb8bc234fecc66"><td class="mdescLeft">&#160;</td><td class="mdescRight">The interrupt handler for SPI interrupts.  <a href="group__spips__v3__0.html#gac57ccd3fab9a25399bdb8bc234fecc66">More...</a><br /></td></tr>
<tr class="separator:gac57ccd3fab9a25399bdb8bc234fecc66"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1f40732e67f63579b811af115f2c575c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spips__v3__0.html#ga1f40732e67f63579b811af115f2c575c">XSpiPs_Abort</a> (<a class="el" href="struct_x_spi_ps.html">XSpiPs</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga1f40732e67f63579b811af115f2c575c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Aborts a transfer in progress by disabling the device and resetting the FIFOs if present.  <a href="group__spips__v3__0.html#ga1f40732e67f63579b811af115f2c575c">More...</a><br /></td></tr>
<tr class="separator:ga1f40732e67f63579b811af115f2c575c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1ef5af2211095df5692567fa4721a8d5"><td class="memItemLeft" align="right" valign="top">s32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spips__v3__0.html#ga1ef5af2211095df5692567fa4721a8d5">XSpiPs_SetSlaveSelect</a> (<a class="el" href="struct_x_spi_ps.html">XSpiPs</a> *InstancePtr, u8 SlaveSel)</td></tr>
<tr class="memdesc:ga1ef5af2211095df5692567fa4721a8d5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Selects or deselect the slave with which the master communicates.  <a href="group__spips__v3__0.html#ga1ef5af2211095df5692567fa4721a8d5">More...</a><br /></td></tr>
<tr class="separator:ga1ef5af2211095df5692567fa4721a8d5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4efc98fb1e6b9a927146bd3bcab8ea8b"><td class="memItemLeft" align="right" valign="top">u8&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spips__v3__0.html#ga4efc98fb1e6b9a927146bd3bcab8ea8b">XSpiPs_GetSlaveSelect</a> (<a class="el" href="struct_x_spi_ps.html">XSpiPs</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga4efc98fb1e6b9a927146bd3bcab8ea8b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Gets the current slave select setting for the SPI device.  <a href="group__spips__v3__0.html#ga4efc98fb1e6b9a927146bd3bcab8ea8b">More...</a><br /></td></tr>
<tr class="separator:ga4efc98fb1e6b9a927146bd3bcab8ea8b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaaa797b9b8184e6f39b0c0038553e48d8"><td class="memItemLeft" align="right" valign="top">s32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spips__v3__0.html#gaaa797b9b8184e6f39b0c0038553e48d8">XSpiPs_SelfTest</a> (<a class="el" href="struct_x_spi_ps.html">XSpiPs</a> *InstancePtr)</td></tr>
<tr class="memdesc:gaaa797b9b8184e6f39b0c0038553e48d8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Runs a self-test on the driver/device.  <a href="group__spips__v3__0.html#gaaa797b9b8184e6f39b0c0038553e48d8">More...</a><br /></td></tr>
<tr class="separator:gaaa797b9b8184e6f39b0c0038553e48d8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad1b67fe9b7737a1af8067d6d69e1508b"><td class="memItemLeft" align="right" valign="top">s32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spips__v3__0.html#gad1b67fe9b7737a1af8067d6d69e1508b">XSpiPs_SetOptions</a> (<a class="el" href="struct_x_spi_ps.html">XSpiPs</a> *InstancePtr, u32 Options)</td></tr>
<tr class="memdesc:gad1b67fe9b7737a1af8067d6d69e1508b"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function sets the options for the SPI device driver.  <a href="group__spips__v3__0.html#gad1b67fe9b7737a1af8067d6d69e1508b">More...</a><br /></td></tr>
<tr class="separator:gad1b67fe9b7737a1af8067d6d69e1508b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga842e4cf2fabf1849f451d9592d0b2722"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spips__v3__0.html#ga842e4cf2fabf1849f451d9592d0b2722">XSpiPs_GetOptions</a> (<a class="el" href="struct_x_spi_ps.html">XSpiPs</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga842e4cf2fabf1849f451d9592d0b2722"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function gets the options for the SPI device.  <a href="group__spips__v3__0.html#ga842e4cf2fabf1849f451d9592d0b2722">More...</a><br /></td></tr>
<tr class="separator:ga842e4cf2fabf1849f451d9592d0b2722"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8359f8188f7bf36a0688963aff561692"><td class="memItemLeft" align="right" valign="top">s32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spips__v3__0.html#ga8359f8188f7bf36a0688963aff561692">XSpiPs_SetClkPrescaler</a> (<a class="el" href="struct_x_spi_ps.html">XSpiPs</a> *InstancePtr, u8 Prescaler)</td></tr>
<tr class="memdesc:ga8359f8188f7bf36a0688963aff561692"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function sets the clock prescaler for an SPI device.  <a href="group__spips__v3__0.html#ga8359f8188f7bf36a0688963aff561692">More...</a><br /></td></tr>
<tr class="separator:ga8359f8188f7bf36a0688963aff561692"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab8f7c1eb75848839d7dc4fa81bc273e4"><td class="memItemLeft" align="right" valign="top">u8&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spips__v3__0.html#gab8f7c1eb75848839d7dc4fa81bc273e4">XSpiPs_GetClkPrescaler</a> (<a class="el" href="struct_x_spi_ps.html">XSpiPs</a> *InstancePtr)</td></tr>
<tr class="memdesc:gab8f7c1eb75848839d7dc4fa81bc273e4"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function gets the clock prescaler of an SPI device.  <a href="group__spips__v3__0.html#gab8f7c1eb75848839d7dc4fa81bc273e4">More...</a><br /></td></tr>
<tr class="separator:gab8f7c1eb75848839d7dc4fa81bc273e4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gafe7ecd11569d8cf376ebc8f982503c52"><td class="memItemLeft" align="right" valign="top">s32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spips__v3__0.html#gafe7ecd11569d8cf376ebc8f982503c52">XSpiPs_SetDelays</a> (<a class="el" href="struct_x_spi_ps.html">XSpiPs</a> *InstancePtr, u8 DelayNss, u8 DelayBtwn, u8 DelayAfter, u8 DelayInit)</td></tr>
<tr class="memdesc:gafe7ecd11569d8cf376ebc8f982503c52"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function sets the delay register for the SPI device driver.  <a href="group__spips__v3__0.html#gafe7ecd11569d8cf376ebc8f982503c52">More...</a><br /></td></tr>
<tr class="separator:gafe7ecd11569d8cf376ebc8f982503c52"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga716d3d27606e693e765a2b9d01cce462"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spips__v3__0.html#ga716d3d27606e693e765a2b9d01cce462">XSpiPs_GetDelays</a> (<a class="el" href="struct_x_spi_ps.html">XSpiPs</a> *InstancePtr, u8 *DelayNss, u8 *DelayBtwn, u8 *DelayAfter, u8 *DelayInit)</td></tr>
<tr class="memdesc:ga716d3d27606e693e765a2b9d01cce462"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function gets the delay settings for an SPI device.  <a href="group__spips__v3__0.html#ga716d3d27606e693e765a2b9d01cce462">More...</a><br /></td></tr>
<tr class="separator:ga716d3d27606e693e765a2b9d01cce462"><td class="memSeparator" colspan="2">&#160;</td></tr>
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